Miniaturized Radio Tranceiver for PocketQubes, Exceeding Performance of CubeSat Solutions

In this paper, a detailed design is presented of a communications module that is designed to fit tight PocketQube design budgets but still offer performance at least comparable to commercial off-the-shelf CubeSat solutions. The communications module features extremely efficient power usage, less than 2 Watt DC for 1 Watt RF output while fitting in an extremely small volume, (42 x 42 x 8mm, approximately a quarter of the volume of CubeSat solutions). Our system also features a new communication scheme based on Short Block LPDC codes that provides a very high code gain (approximately 6dB for hard-decision and 9dB for soft-decision) using a high code rate. A ground modem implementation based on GNURadio is also presented, taking advantage of a new implementation for low-latency asynchronous data transmission

Review of Water Capturing Devices for Lunar ISRU

The use of resources present on celestial bodies, known as In-Situ Resource Utilization (ISRU), is becoming more and more important in space exploration due to the high cost of launching mass into orbit. ISRU would enable long-term manned operations and permanent (robotic) presence on extra-terrestrial bodies. Water is considered to be one of the most important resources for further space exploration and is currently investigated for extraction and purification on the future manned Lunar base envisioned around 2025. Previous research focused on the extraction of water from regolith but little work has been done to find ways on how to capture and liquefy the water vapour after its extraction

A Pico-Satellite Design to Demonstrate Trajectory and Science Applications

This paper presents the design, integration and testing of a pico satellite, Delfi-PQ, a 3P PocketQube developed by Delft University of Technology, expected to be launched at the end of 2020. The main goal of this project is creating a miniaturized platform for future space missions with performances comparable to CubeSats, taking advantage of the miniaturization of electronic components and their integration. Education of aerospace engineering students is a second key goal of the project, where students involved in the project as part of their curricular activities

Sonno e coscienza

Le teorie della coscienza proposte da Baars (Spazio di Lavoro Globale), da Edelman (Nucleo Dinamico), da Tononi (Informazione Integrata) e da Ward (Nucleo Dinamico Talamico), considerano la coscienza come una proprietà emergente del funzionamento del Sistema Nervoso Centrale dipendente, oltre che dalla semplice attività di scarica dei neuroni, anche dalla connettività cerebrale globale. Il sonno rappresenta una finestra privilegiata per studiare i Correlati Neurali della Coscienza in quanto i suoi meccanismi stereotipati e non condizionati, a differenza della veglia, dalla motivazione, dall’attenzione, dall’umore, ecc., possono fornire indicazioni, a partire dal livello molecolare fino a quello di rete, sulle proprietà integrative del Sistema Nervoso Centrale e, in particolare, del sistema talamo-corticale. In quest’ottica entrambe le fasi del sonno forniscono indicazioni peculiari: il Non Rapid-Eye Movement (NREM), ovvero l’unico stato fisiolo-gico in cui la coscienza svanisce, permette di associare mezzo secondo di silenzio elettrico, paradigmatico delle Oscillazioni Lente del Sonno, alla disgregazione dei pattern di integrazione corticale su larga scala, mentre il Rapid-Eye Movement (REM), cioè lo stadio del sonno in cui la coscienza riemerge attraverso i sogni, seppur in assenza di vigilanza o di qualsiasi interazione sensoriale con il mondo esterno, permette di legare lo scenario onirico cosciente ad un unico neurotrasmettitore: l’acetilcolina

Lavender aromatherapy: a systematic review from essential oil extraction and administration to cognitive enhancing effects.

Modern society is reviving the practice of aromatherapy, and lavender is reported being the most worldwide purchased plant for essential oil (EO) extraction. Since recent studies reported cognitive enhancing effects of lavender besides the hypno-inducing effects, a literature review is needed. Considering EO quality and diffusion devices, we conducted a systematic review on the effects of lavender EO inhalation on arousal, attention and memory in healthy subjects. Starting from this new multidisciplinary perspective, cognitive effects were reviewed to link outcomes to effective and reproducible protocols. A systematic search on MEDLINE, ERIC, PsycInfo, Google Scholar, and Scopus databases using Cognitive Atlas and plant-related keywords was conducted. Among the 1,203 articles yielded, 11 met eligibility criteria. Subjects administered with lavender EO displayed arousal decrease and sustained attention increase. Controversial results emerged regarding memory. Lack of EO quality assessment and protoco

Is RISC-V ready for Space? A Security Perspective

Integrated circuits employed in space applications generally have very low-volume production and high performance requirements. Therefore, the adoption of Commercial-Off-The-Shelf (COTS) components and Third Party Intellectual Property cores (3PIPs) is of extreme interest to make system design, implementation and deployment cost-effective and viable w.r.t. performance. On the other hand, this design paradigm exposes the system to a number of security threats both at design-time and at runtime. In this paper, we discuss the security issues related to space applications mainly focusing on threats that come from the adoption of the well-known RISCV microprocessor. We highlight how Hardware Trojan horses (HTHs) and Microarchitectural Side-Channel Attacks (MSCAs) may compromise the overall system operation by either altering its nominal behavior or by stealing secret information. We discuss the security extensions provided by the RISC-V architecture as well as their limitations. The paper is concluded by an overview of the issues that are still open regarding the security of such microprocessor in the space domain. Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.Space Systems Egineerin

Is RISC-V ready for Space? A Security Perspective

Integrated circuits employed in space applications generally have very low-volume production and high performance requirements. Therefore, the adoption of Commercial-Off-The-Shelf (COTS) components and Third Party Intellectual Property cores (3PIPs) is of extreme interest to make system design, implementation and deployment cost-effective and viable w.r.t. performance. On the other hand, this design paradigm exposes the system to a number of security threats both at design-time and at runtime. In this paper, we discuss the security issues related to space applications mainly focusing on threats that come from the adoption of the well-known RISCV microprocessor. We highlight how Hardware Trojan horses (HTHs) and Microarchitectural Side-Channel Attacks (MSCAs) may compromise the overall system operation by either altering its nominal behavior or by stealing secret information. We discuss the security extensions provided by the RISC-V architecture as well as their limitations. The paper is concluded by an overview of the issues that are still open regarding the security of such microprocessor in the space domain

Preventing Soft Errors and Hardware Trojans in RISC-V Cores

Soft errors in embedded systems' memories like single-event upsets and multiple-bit upsets lead to data and instruction corruption. Therefore, devices deployed in harsh environments, such as space, use fault-tolerant processors or redundancy methods to ensure critical application dependability. Another rising concern in secure, critical space applications is the possible introduction of hardware Trojans in an untrusted phase of the manufacturing process. Besides environmental side-effects, an adversary that has injected a malicious mechanism e.g., in the processor or memory can trigger unwanted behavior or leak sensitive information. Techniques to prevent or mitigate hardware Trojans are important to ensure hardware security. Leveraging the openness of the RISC-V ISA, this paper introduces a novel solution to improve the security and dependability of softcores with a low area and latency overhead. The instruction validator which is the first part of this solution can effectively detect hardware Trojans and multiple-bit upsets in the instruction memory by checking instruction/address pairs using a Bloom filter probabilistic data structure. The second part of the solution is the proposal of an error correction code instruction memory using Hamming single-error correction to detect and correct single-event upsets. It has also been proven that the Hamming decoder improves the detection performance of the instruction validator